The QL's ROM Port was located at address $C000_hex or %1100 0000 0000 0000_bin or 49,152_dec and together with the ROMOEH line, any ROM in the slot would be enabled when A15, A14 and ROMOEH were all high. A15 and A14 are, of course, both high when addressing any byte in the ROM.

ROMs were up to 16Kb (16,384 bytes) in size so the ROM port allowed for addresses between $C000_hex and $FFFF_hex so any address in the ROM will have bits 15 and 14 set, thus, to read a byte from the ROM, simply (!) set up the desired address on the address lines, then take ROMOEH high. That will, with a bit of decoding, enable the ROM (usually an EPROM) output and the byte can be read from the data lines. Easy?

Dismantling a ROM cartridge shows that there are two chips and a couple of smoothing capacitors inside - one across the power lines of each chip.

One chip is the EPROM - in my case, a MBM27128-25, the other is a DM74LS10N which is a triple 3 input NAND gate.

Only one of the three NAND gates within the chip is used, and it is connected to A15, A14 and ROMOEH as inputs, and the output is connected to Q^bar (IE active low) which enables the EPROM to output it's data according to the actual address on the 16 address lines. When A15, A14 and ROMOEH are high, the NAND gate output goes low and that brings the EPROM's Q^bar low enabling the data to be read.

The ROM cartridge connector has tracks on both sides of the PCB to allow it to connect to the QL's ROM Port. These tracks are connected internally to the EPROM chip and the Address decoding logic in the NAND gate chip. The upper side of the PCB resembles this, and is the side without the two chips:

        +------------+
               1     | VDD
               2     | A14
               3     | A13
               4     | A8
               5     | A9
               6 ||||  SLOT
               7     | A11
               8     | ROMOEH
               9     | A10
              10     | A15
              11     | D7
              12     | D6
              13     | D5
              14     | D4
              15     | D3
        +------------+

The lower side of the PCB is the side containing the two chips, and the tracks are as follows:

        +--------------------------+
     NC |     1    o---v---o
    A12 |     2    o       o
     A7 |     3    o       o
     A6 |     4    o       o
     A5 |     5    o       o  o-v-o
   SLOT  |||| 6    o       o  o   o
     A4 |     7    o       o  o   o
     A3 |     8    o       o  o   o
     A2 |     9    o       o  o   o
     A1 |    10    o       o  o   o
     A0 |    11    o       o  o---o
     D0 |    12    o       o
     D1 |    13    o       o
     D2 |    14    o       o
    GND |    15    o-------o
        +--------------------------+

The numbering above refers to the tracks on the PCB and not to the pins on the EPROM.

On track 1, NC means Not Connected.

The functions of the tracks are as follows:

WARNING: Never plug or unplug a ROM cartridge while the QL power is on.